/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2000 Equator Technologies
 */
#ifndef _ASM_BSP_PGTABLE_H_
#define _ASM_BSP_PGTABLE_H_

#include <linux/linkage.h>
#include <asm/io.h>

/* Cache flushing:
 *
 *  - flush_cache_all() flushes entire cache
 *  - flush_cache_mm(mm) flushes the specified mm context's cache lines
 *  - flush_cache_page(mm, vmaddr) flushes a single page
 *  - flush_cache_range(mm, start, end) flushes a range of pages
 *  - flush_page_to_ram(page) write back kernel page to ram
 */
void dma_cache_wback(unsigned long start, unsigned long size);
void dma_cache_wback_inv(unsigned long start, unsigned long size);
void dma_cache_inv(unsigned long start, unsigned long size);

extern void flush_cache_all     (void);
extern void flush_cache_range   (struct mm_struct *mm, unsigned long start, unsigned long end);
extern void flush_cache_page    (struct vm_area_struct *vma, unsigned long page);
extern void flush_cache_mm      (struct mm_struct *mm);
extern void flush_page_to_ram   (unsigned long page);
#define flush_icache_range(start, end) flush_cache_all()
#define flush_dcache_page(page)			do { } while (0)

/* TLB flushing:
 *
 *  - flush_tlb_all() flushes all processes TLB entries
 *  - flush_tlb_mm(mm) flushes the specified mm context TLB entries
 *  - flush_tlb_page(mm, vmaddr) flushes a single page
 *  - flush_tlb_range(mm, start, end) flushes a range of pages
 */
extern void flush_tlb_all       (void);
extern void flush_tlb_mm        (struct mm_struct *mm);
extern void flush_tlb_range     (struct mm_struct *mm, unsigned long start, unsigned long end);
/* by skpark, 040715 */
//#ifdef USE_SAMSUNG_PATCH
//extern void flush_tlb_page      (struct vm_area_struct *vma, unsigned long page);
//#else
extern void flush_tlb_page_mm   (struct mm_struct *mm, unsigned long page);

#define flush_tlb_page(vma,page) flush_tlb_page_mm(vma->vm_mm, page)
//#endif
/* by skpark, 040715 */

/* ALthough the Linux source base assumes three- level page tables,
 * BSP Linux physically uses a two-level page table, similar to the i386. 
 * In this page table, the logical middle directory is a dummy, so that 
 * the global page directory (pgdir) immediately selects page tables.
 * With a PGDIR_SHIFT value of 23, the first 9 bits of an address select
 * a page table from the global page directory; the next 9 bits select
 * a memory page from the page table, and the remaining 14 bits serve as an offset
 * in the 16 kB memory pages.
 */

/* PGDIR_SHIFT determines what a third-level page table entry can map */
#define PGDIR_SHIFT	23
#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
#define PGDIR_MASK	(~(PGDIR_SIZE-1))

/* PMD_SHIFT determines the size of the area a second-level page table can map */
#define PMD_SHIFT	PGDIR_SHIFT
#define PMD_SIZE	PGDIR_SIZE
#define PMD_MASK	PGDIR_MASK

/* Entries per page directory level: we use two-level, so
 * we don't really have any PMD directory physically.
 */
#define PTRS_PER_PGD	(1 << (32-PGDIR_SHIFT))
#define PTRS_PER_PMD     1
#define PTRS_PER_PTE	 PTRS_PER_PGD

/*
 * For pte cache: number of page tables per memory page.
 */
#define NROF_PTS_PER_PAGE       (PAGE_SIZE / (PTRS_PER_PTE*sizeof(pte_t)))

#define USER_PTRS_PER_PGD	(TASK_SIZE/PGDIR_SIZE)




/* Format of Page Table Entries 

 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 
 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
-----------------------------------------------------------------
|       |       |       |       |       |       |       |       |
|       |       |       |       |       |       |       |       |
-----------------------------------------------------------------




|----------------------------------|
    Pysical Page Number (PPN)
   bits 31..14: (phys_page >> 14)
    maps to DTLBL bits 19..2
                                           |-----------|    V|--|
                                    "hard" permissions       bits 2-0 
                                        bits 11..5           clustered page size
                                       DTLBL 31..25          plus valid bit, 16K to 1M

                                    /--/                |-|       
                                 DTS ID           "soft" perms
                                 bits 15..14      bits 4..3

 - "hard" permissions are those that map directly to bits in the
    DTLBL register
    o valid, shared, reference, application access/write kernel write,
      cacheable

 - "soft" permissions are those implemented in software
    o modified, accessed and dirty  

 - bits 4..0 unused

 */

/* DTS ID */
#define DTSID_SDRAM      0  /* deliberatly zero: default DTS */
#define DTSID_PCI        1
#define DTSID_PIO        2

#define _PAGE_DTSID_SHIFT          12
#define _PAGE_DTSID_MASK          (0x3 << _PAGE_DTSID_SHIFT)

#define _PAGE_SDRAM                (DTSID_SDRAM << _PAGE_DTSID_SHIFT)
#define _PAGE_PCI                  (DTSID_PCI   << _PAGE_DTSID_SHIFT)
#define _PAGE_PIO                  (DTSID_PIO   << _PAGE_DTSID_SHIFT)

/* 'real' bits from DTLBL register */
#define _PAGE_VALID                (1<<11)
#define _PAGE_SHARED               (1<<10)
#define _PAGE_REFERENCE            (1<<9)
#define _PAGE_APPLICATION_ACCESS   (1<<8)
#define _PAGE_APPLICATION_WRITE    (1<<7)
#define _PAGE_KERNEL_WRITE         (1<<6)
#define _PAGE_CACHABLE             (1<<5)

/* some bits from PTE go directly into [di]tlbl */
#define _PAGE_DTLBL_MASK           0x00000fe0
#define _PAGE_DTLBL_SHIFT          20
#define _PAGE_ITLBL_MASK           0x00000f00
#define _PAGE_ITLBL_SHIFT          20

/* DTSID bits, plus 'real' bits */
#define _PAGE_PROT_MASK            0x00003fe0

/* implemented in software.  */
#define _PAGE_DIRTY                (1<<4)
#define _PAGE_ACCESSED             (1<<3)  
#define _PAGE_SIZE                 (0x7)

/* misc. combinations */
#define _PAGE_PRESENT    (_PAGE_VALID)
#define _PAGE_READ       (_PAGE_APPLICATION_ACCESS)
#define _PAGE_WRITE      (_PAGE_KERNEL_WRITE | _PAGE_APPLICATION_WRITE)

#define ___PAGE_REFERENCE 0
#define __PAGE_NONE               (_PAGE_PRESENT | _PAGE_REFERENCE)
#define __PAGE_SHARED             (__PAGE_NONE | _PAGE_READ | _PAGE_WRITE        | _PAGE_CACHABLE)
#define __PAGE_COPY               (__PAGE_NONE | _PAGE_READ                      | _PAGE_CACHABLE)
#define __PAGE_READONLY           (__PAGE_NONE | _PAGE_READ                      | _PAGE_CACHABLE)
#define __PAGE_KERNEL             (__PAGE_NONE |              _PAGE_KERNEL_WRITE | _PAGE_CACHABLE)


#define __PAGE_SHARED_RO          (__PAGE_NONE | _PAGE_READ                      | _PAGE_CACHABLE)
#define __PAGE_SHARED_RO_UNCACHED (__PAGE_NONE | _PAGE_READ                                      )
#define __PAGE_SHARED_UNCACHED    (__PAGE_NONE | _PAGE_READ | _PAGE_WRITE                        )
#define __PAGE_KERNEL_UNCACHED    (__PAGE_NONE |              _PAGE_KERNEL_WRITE                 )


#define PAGE_NONE             __pgprot(__PAGE_NONE)
#define PAGE_SHARED           __pgprot(__PAGE_SHARED)
#define PAGE_SHARED_UNCACHED  __pgprot(__PAGE_SHARED_UNCACHED)
#define PAGE_COPY             __pgprot(__PAGE_COPY)
#define PAGE_READONLY         __pgprot(__PAGE_READONLY)
#define PAGE_KERNEL           __pgprot(__PAGE_KERNEL)
#define PAGE_KERNEL_UNCACHED  __pgprot(__PAGE_KERNEL_UNCACHED)

#define _PAGE_CHG_MASK (PAGE_MASK)

/*
 * BSP can't do page protection for execute, and considers that the same like
 * read. Also, write permissions imply read permissions. This is the closest
 * we can get by reasonable means..
 */
#define __P000	__PAGE_NONE
#define __P001	__PAGE_READONLY
#define __P010	__PAGE_COPY
#define __P011	__PAGE_COPY
#define __P100	__PAGE_READONLY
#define __P101	__PAGE_READONLY
#define __P110	__PAGE_COPY
#define __P111	__PAGE_COPY

#define __S000	__PAGE_NONE
#define __S001	__PAGE_READONLY
#define __S010	__PAGE_SHARED
#define __S011	__PAGE_SHARED
#define __S100	__PAGE_READONLY
#define __S101	__PAGE_READONLY
#define __S110	__PAGE_SHARED
#define __S111	__PAGE_SHARED

#if !defined (_LANGUAGE_ASSEMBLY)

/*
 * BAD_PAGETABLE is used when we need a bogus page-table, while
 * BAD_PAGE is used for a bogus page.
 *
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern pte_t __bad_page(void);
extern pte_t *__bad_pagetable(void);

extern unsigned long empty_zero_page;

#define BAD_PAGETABLE		__bad_pagetable()
#define BAD_PAGE		__bad_page()
#define ZERO_PAGE(__vaddr)	empty_zero_page

/* number of bits that fit into a memory pointer */
#define BITS_PER_PTR			(8*sizeof(unsigned long))

/* to align the pointer to a pointer address */
#define PTR_MASK			(~(sizeof(void*)-1))

/*
 * sizeof(void*) == (1 << SIZEOF_PTR_LOG2)
 */
#define SIZEOF_PTR_LOG2			2

/* to find an entry in a page-table */
#define PAGE_PTR(address) \
((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)

extern void (*load_pgd)(unsigned long pg_dir);

/* to set the page-dir */
#define SET_PAGE_DIR(tsk,pgdir) (tsk)->tss.pg_dir = ((unsigned long) (pgdir))

extern pmd_t invalid_pte_table[PAGE_SIZE/sizeof(pmd_t)];

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
extern inline unsigned long pte_page(pte_t pte)
{
#ifdef USE_SAMSUNG_PATCH
	 return PAGE_OFFSET + (pte_val(pte) & PAGE_MASK);
#else
        return( (unsigned long)bus_to_virt(pte_val(pte) & PAGE_MASK) );      
#endif
}

extern inline unsigned long pmd_page(pmd_t pmd)
{
	return pmd_val(pmd);
}

extern inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
{
	pmd_val(*pmdp) = (((unsigned long) ptep) & PAGE_MASK);
}

extern inline int pte_none(pte_t pte)    { return !pte_val(pte); }
extern inline int pte_present(pte_t pte) { return pte_val(pte) & _PAGE_PRESENT; }

/* Certain architectures need to do special things when pte's
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 */
extern inline void set_pte(pte_t *ptep, pte_t pteval)
{
#ifdef PAGE_TABLE_DEBUG
	printk("set_pte(ptep=0x%08x, pteval=0x%08x)\n",
	       (u32)ptep, pte_val(pteval));
#endif
	*ptep = pteval;
}

extern inline void pte_clear(pte_t *ptep)
{
	set_pte(ptep, __pte(0));
}

/*
 * Empty pgd/pmd entries point to the invalid_pte_table.
 */
extern inline int pmd_none(pmd_t pmd)
{
	return pmd_val(pmd) == (unsigned long) invalid_pte_table;
}

extern inline int pmd_bad(pmd_t pmd)
{
	return ((pmd_page(pmd) > (unsigned long) high_memory) ||
	        (pmd_page(pmd) < PAGE_OFFSET));
}

extern inline int pmd_present(pmd_t pmd)
{
	return pmd_val(pmd);
}

extern inline void pmd_clear(pmd_t *pmdp)
{
	pmd_val(*pmdp) = ((unsigned long) invalid_pte_table);
}

/*
 * The "pgd_xxx()" functions here are trivial for a folded two-level
 * setup: the pgd is never bad, and a pmd always exists (as it's folded
 * into the pgd entry)
 */
extern inline int  pgd_none(pgd_t pgd)		{ return 0; }
extern inline int  pgd_bad(pgd_t pgd)		{ return 0; }
extern inline int  pgd_present(pgd_t pgd)	{ return 1; }
extern inline void pgd_clear(pgd_t *pgdp)	{ }

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
extern inline int pte_pgprots     (pte_t pte)	{ return  pte_val(pte) & _PAGE_PROT_MASK;  }
extern inline int pte_read        (pte_t pte)	{ return  pte_val(pte) & _PAGE_READ;       }
extern inline int pte_write       (pte_t pte)	{ return  pte_val(pte) & _PAGE_WRITE;      }
extern inline int pte_dirty       (pte_t pte)	{ return  pte_val(pte) & _PAGE_DIRTY;      }
extern inline int pte_young       (pte_t pte)	{ return  pte_val(pte) & _PAGE_ACCESSED;   }
extern inline int pte_pgsizevalid (pte_t pte)	{ return (pte_val(pte) & _PAGE_SIZE) != 0; }


extern inline int pte_pgsize(pte_t pte)	
{      
       int pgsize= pte_val(pte) & _PAGE_SIZE;

       if (pgsize == 0) { return 0;        }
                   else { return pgsize-1; }    
}

extern inline pte_t pte_setpgsize(pte_t pte, int size)
{
	pte_val(pte) &= ~_PAGE_SIZE;
	pte_val(pte) |= (size+1);
	return pte;
}

extern inline pte_t pte_invalidate_pgsize(pte_t pte)
{
	pte_val(pte) &= ~_PAGE_SIZE;
	return pte;
}

extern inline pte_t pte_wrprotect(pte_t pte)
{
	pte_val(pte) &= ~_PAGE_WRITE;
	return pte;
}

extern inline pte_t pte_rdprotect(pte_t pte)
{
	pte_val(pte) &= ~_PAGE_READ;
	return pte;
}

extern inline pte_t pte_mkwrite(pte_t pte)
{
	pte_val(pte) |= _PAGE_WRITE;
	return pte;
}

extern inline pte_t pte_mkread(pte_t pte)
{
	pte_val(pte) |= _PAGE_READ;
	return pte;
}




extern inline pte_t pte_mkdirty(pte_t pte)
{
	pte_val(pte) |= _PAGE_DIRTY;
	return pte;
}

extern inline pte_t pte_mkclean(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_DIRTY);
	return pte;
}



extern inline pte_t pte_mkyoung(pte_t pte)
{
	pte_val(pte) |=  (_PAGE_ACCESSED | ___PAGE_REFERENCE);
	return pte;
}

extern inline pte_t pte_mkold(pte_t pte)
{
	pte_val(pte) &= ~(_PAGE_ACCESSED | ___PAGE_REFERENCE);
        return pte;
}

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
extern inline pte_t mk_pte(unsigned long page, pgprot_t pgprot)
{
#ifdef USE_SAMSUNG_PATCH
	return __pte(((page & PAGE_MASK) - PAGE_OFFSET) | pgprot_val(pgprot));
#else
       	return __pte(virt_to_bus((void *)(page & PAGE_MASK)) | pgprot_val(pgprot));      
#endif
}

extern inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
{
#ifdef USE_SAMSUNG_PATCH
	return __pte(physpage | pgprot_val(pgprot));
#else
	return __pte(phys_to_bus(physpage) | pgprot_val(pgprot));    
#endif
}

extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
}

/* to find an entry in a kernel page-table-directory */
#define pgd_offset_k(address) pgd_offset(&init_mm, address)

/* to find an entry in a page-table-directory */
extern inline pgd_t *pgd_offset(struct mm_struct *mm, unsigned long address)
{
	return mm->pgd + (address >> PGDIR_SHIFT);
}

/* Find an entry in the second-level page table.. */
extern inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address)
{
	return (pmd_t *) dir;
}

/* Find an entry in the third-level page table.. */ 
extern inline pte_t *pte_offset(pmd_t * dir, unsigned long address)
{
	return (pte_t *) (pmd_page(*dir)) +
	       ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
}

/*
 * Initialize new page directory with pointers to invalid ptes
 */
extern void pgd_init(unsigned long page);

/*
 * Allocate and free page tables. The xxx_kernel() versions are
 * used to allocate a kernel page table - this turns on ASN bits
 * if any.
 */

#define pgd_quicklist (current_cpu_data.pgd_quick)
#define pmd_quicklist ((unsigned long *)0)
#define pte_quicklist (current_cpu_data.pte_quick)
#define pgtable_cache_size (current_cpu_data.pgtable_cache_sz)

extern __inline__ pgd_t *get_pgd_slow(void)
{
	pgd_t *ret = (pgd_t *)__get_free_page(GFP_KERNEL), *init;

	if (ret) {
		init = pgd_offset(&init_mm, 0);
		pgd_init((unsigned long)ret);
		memcpy (ret + USER_PTRS_PER_PGD, init + USER_PTRS_PER_PGD,
			(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
	}
#ifdef PAGE_TABLE_DEBUG
	printk("get_pgd_slow(): returning 0x%08x\n", (u32)ret);
#endif
	return ret;
}

extern __inline__ pgd_t *get_pgd_fast(void)
{
	unsigned long *ret;

	if((ret = pgd_quicklist) != NULL) {
		pgd_quicklist = (unsigned long *)(*ret);
		ret[0] = ret[1];
		pgtable_cache_size--;
	} else
		ret = (unsigned long *)get_pgd_slow();
	return (pgd_t *)ret;
}

extern __inline__ void free_pgd_fast(pgd_t *pgd)
{
	*(unsigned long *)pgd = (unsigned long) pgd_quicklist;
	pgd_quicklist = (unsigned long *) pgd;
	pgtable_cache_size++;
}

extern __inline__ void free_pgd_slow(pgd_t *pgd)
{
	free_page((unsigned long)pgd);
}

extern pte_t *get_pte_slow(pmd_t *pmd, unsigned long address_preadjusted);
extern pte_t *get_pte_kernel_slow(pmd_t *pmd, unsigned long address_preadjusted);

extern __inline__ pte_t *get_pte_fast(void)
{
	unsigned long *ret;

	if((ret = (unsigned long *)pte_quicklist) != NULL) {
		pte_quicklist = (unsigned long *)(*ret);
		ret[0] = ret[1];
		pgtable_cache_size--;
	}
	return (pte_t *)ret;
}

extern __inline__ void free_pte_fast(pte_t *pte)
{
#ifdef PAGE_TABLE_DEBUG
	printk("free_pte_fast(pte=0x%08x)\n", pte_val(*pte));
#endif
	*(unsigned long *)pte = (unsigned long) pte_quicklist;
	pte_quicklist = (unsigned long *) pte;
	pgtable_cache_size++;
}

extern __inline__ void free_pte_slow(pte_t *pte)
{
	free_page((unsigned long)pte);
}

/* We don't use pmd cache, so these are dummy routines */
extern __inline__ pmd_t *get_pmd_fast(void)
{
	return (pmd_t *)0;
}

extern __inline__ void free_pmd_fast(pmd_t *pmd)
{
}

extern __inline__ void free_pmd_slow(pmd_t *pmd)
{
}

extern void __bad_pte(pmd_t *pmd);
extern void __bad_pte_kernel(pmd_t *pmd);

#define pte_free_kernel(pte)    free_pte_fast(pte)
#define pte_free(pte)           free_pte_fast(pte)
#define pgd_free(pgd)           free_pgd_fast(pgd)
#define pgd_alloc()             get_pgd_fast()

extern inline pte_t * pte_alloc_kernel(pmd_t * pmd, unsigned long address)
{
#ifdef PAGE_TABLE_DEBUG
	printk("pte_alloc_kernel(pmd=0x%08x, address=0x%08x\n",
	       pmd_val(*pmd), (u32)address);
#endif

	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);

	if (pmd_none(*pmd)) {
		pte_t *page = get_pte_fast();
		if (page) {
			pmd_val(*pmd) = (unsigned long)page;
			return page + address;
		}
		return get_pte_kernel_slow(pmd, address);
	}
	if (pmd_bad(*pmd)) {
		__bad_pte_kernel(pmd);
		return NULL;
	}
	return (pte_t *) pmd_page(*pmd) + address;
}

extern inline pte_t * pte_alloc(pmd_t * pmd, unsigned long address)
{
#ifdef PAGE_TABLE_DEBUG
	printk("pte_alloc(pmd=0x%08x, address=0x%08x)\n",
	       pmd_val(*pmd), (u32)address);
#endif

	address = (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);

	if (pmd_none(*pmd)) {
		pte_t *page = get_pte_fast();
		if (page) {
			pmd_val(*pmd) = (unsigned long)page;
			return page + address;
		}
		return get_pte_slow(pmd, address);
	}
	if (pmd_bad(*pmd)) {
		__bad_pte(pmd);
		return NULL;
	}
	return (pte_t *) pmd_page(*pmd) + address;
}

/*
 * allocating and freeing a pmd is trivial: the 1-entry pmd is
 * inside the pgd, so has no extra memory associated with it.
 */
extern inline void pmd_free(pmd_t * pmd)
{
}

extern inline pmd_t * pmd_alloc(pgd_t * pgd, unsigned long address)
{
#ifdef PAGE_TABLE_DEBUG
	printk("pmd_alloc(pgd=0x%08x, address=0x%08x): pgd_val=0x%x\n",
	       (u32)pgd, address, pgd_val(*pgd));
#endif
	return (pmd_t *) pgd;
}

#define pmd_free_kernel		pmd_free
#define pmd_alloc_kernel	pmd_alloc

extern int do_check_pgt_cache(int, int);

extern inline void set_pgdir(unsigned long address, pgd_t entry)
{
	struct task_struct * p;
	pgd_t *pgd;
#ifdef __SMP__
	int i;
#endif	
#ifdef PAGE_TABLE_DEBUG
        printk("set_pgdir(address=0x%08x, entry=0x%08x)\n",
	       (u32)address, pgd_val(entry));
#endif
	read_lock(&tasklist_lock);
	for_each_task(p) {
		if (!p->mm)
			continue;
		*pgd_offset(p->mm,address) = entry;
	}
	read_unlock(&tasklist_lock);
#ifndef __SMP__
	for (pgd = (pgd_t *)pgd_quicklist; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
		pgd[address >> PGDIR_SHIFT] = entry;
#else
	/* To pgd_alloc/pgd_free, one holds master kernel lock and so does our
	   callee, so we can modify pgd caches of other CPUs as well. -jj */
	for (i = 0; i < NR_CPUS; i++)
		for (pgd = (pgd_t *)cpu_data[i].pgd_quick; pgd; pgd = (pgd_t *)*(unsigned long *)pgd)
			pgd[address >> PGDIR_SHIFT] = entry;
#endif
}

extern pgd_t swapper_pg_dir[1024];


#define update_mmu_cache(vma,address,pte)

/*
 * Kernel with 32 bit address space
 */

static inline u32 ror11( u32 x )
{
    return (x >> 11) | (x << 21);
}

static inline u32 rol11( u32 x )
{
    return (x >> 21) | (x << 11);
}




#define SWP_TYPE(entry)         ((ror11(entry) >> 1) & 0x3f)
#define SWP_OFFSET(entry)       ( ror11(entry) >> 8)
#define SWP_ENTRY(type,offset)    rol11(((type) << 1) | ((offset) << 8))

extern void* module_map(unsigned long size);
extern void  module_unmap(void* module);

/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
#define PageSkip(page)		(0)
#define kern_addr_valid(addr)	(1)

#endif	/* !defined (_LANGUAGE_ASSEMBLY) */

#endif	/* _ASM_BSP_PGTABLE_H_ */
