From f7df9a8f3ce3a600ceeb7302bf0de899f321c818 Mon Sep 17 00:00:00 2001
From: Alison Wang <b18965@freescale.com>
Date: Thu, 4 Aug 2011 09:59:45 +0800
Subject: [PATCH 23/52] Replace readl and writel for FEC driver

Replace readl and writel by fec_readl and fec_writel
for FEC driver.

Signed-off-by: Alison Wang <b18965@freescale.com>
---
 drivers/net/fec.c |  129 ++++++++++++++++++++++++++++-------------------------
 1 files changed, 68 insertions(+), 61 deletions(-)

--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -244,6 +244,11 @@ static void fec_stop(struct net_device *
 /* Transmitter timeout */
 #define TX_TIMEOUT (2 * HZ)
 
+#define fec_readl(addr)		\
+	({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
+#define fec_writel(b, addr)	\
+	(void)((*(volatile unsigned int *) (addr)) = (b))
+
 static void *swap_buffer(void *bufaddr, int len)
 {
 	int i;
@@ -347,7 +352,7 @@ fec_enet_start_xmit(struct sk_buff *skb,
 	bdp->cbd_sc = status;
 
 	/* Trigger transmission start */
-	writel(0, fep->hwp + FEC_X_DES_ACTIVE);
+	fec_writel(0, fep->hwp + FEC_X_DES_ACTIVE);
 
 	/* If this was the last BD in the ring, start at the beginning again. */
 	if (status & BD_ENET_TX_WRAP)
@@ -390,8 +395,8 @@ fec_enet_interrupt(int irq, void * dev_i
 	irqreturn_t ret = IRQ_NONE;
 
 	do {
-		int_events = readl(fep->hwp + FEC_IEVENT);
-		writel(int_events, fep->hwp + FEC_IEVENT);
+		int_events = fec_readl(fep->hwp + FEC_IEVENT);
+		fec_writel(int_events, fep->hwp + FEC_IEVENT);
 
 #ifdef CONFIG_FEC_1588
 		if (__raw_readb(MCF_DTIM1_DTER) & MCF_DTIM_DTER_REF)
@@ -646,7 +651,7 @@ rx_processing_done:
 		 * incoming frames.  On a heavily loaded network, we should be
 		 * able to keep up at the expense of system resources.
 		 */
-		writel(0, fep->hwp + FEC_R_DES_ACTIVE);
+		fec_writel(0, fep->hwp + FEC_R_DES_ACTIVE);
 	}
 	fep->cur_rx = bdp;
 
@@ -686,9 +691,9 @@ static void __inline__ fec_get_mac(struc
 	 */
 	if (!is_valid_ether_addr(iap)) {
 		*((unsigned long *) &tmpaddr[0]) =
-			be32_to_cpu(readl(fep->hwp + FEC_ADDR_LOW));
+			be32_to_cpu(fec_readl(fep->hwp + FEC_ADDR_LOW));
 		*((unsigned short *) &tmpaddr[4]) =
-			be16_to_cpu(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
+			be16_to_cpu(fec_readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
 		iap = &tmpaddr[0];
 	}
 
@@ -740,9 +745,9 @@ static void fec_enet_adjust_link(struct
 
 		if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
 #ifdef CONFIG_FEC_1588
-			writel(0x00000012, fep->hwp + FEC_ECNTRL);
+			fec_writel(0x00000012, fep->hwp + FEC_ECNTRL);
 #else
-			writel(0x00000002, fep->hwp + FEC_ECNTRL);
+			fec_writel(0x00000002, fep->hwp + FEC_ECNTRL);
 #endif
 		status_change = 1;
 	}
@@ -763,7 +768,7 @@ static int fec_enet_mdio_read(struct mii
 	init_completion(&fep->mdio_done);
 
 	/* start a read op */
-	writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
+	fec_writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
 		FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
 		FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
 
@@ -777,7 +782,7 @@ static int fec_enet_mdio_read(struct mii
 	}
 
 	/* return value */
-	return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
+	return FEC_MMFR_DATA(fec_readl(fep->hwp + FEC_MII_DATA));
 }
 
 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
@@ -790,7 +795,7 @@ static int fec_enet_mdio_write(struct mi
 	init_completion(&fep->mdio_done);
 
 	/* start a write op */
-	writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
+	fec_writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
 		FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
 		FEC_MMFR_TA | FEC_MMFR_DATA(value),
 		fep->hwp + FEC_MII_DATA);
@@ -905,7 +910,7 @@ static int fec_enet_mii_init(struct plat
 	 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
 	 */
 	fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk), 5000000) << 1;
-	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
+	fec_writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
 	fep->mii_bus = mdiobus_alloc();
 	if (fep->mii_bus == NULL) {
@@ -1151,30 +1156,30 @@ static void set_multicast_list(struct ne
 	unsigned char hash;
 
 	if (dev->flags & IFF_PROMISC) {
-		tmp = readl(fep->hwp + FEC_R_CNTRL);
+		tmp = fec_readl(fep->hwp + FEC_R_CNTRL);
 		tmp |= 0x8;
-		writel(tmp, fep->hwp + FEC_R_CNTRL);
+		fec_writel(tmp, fep->hwp + FEC_R_CNTRL);
 		return;
 	}
 
-	tmp = readl(fep->hwp + FEC_R_CNTRL);
+	tmp = fec_readl(fep->hwp + FEC_R_CNTRL);
 	tmp &= ~0x8;
-	writel(tmp, fep->hwp + FEC_R_CNTRL);
+	fec_writel(tmp, fep->hwp + FEC_R_CNTRL);
 
 	if (dev->flags & IFF_ALLMULTI) {
 		/* Catch all multicast addresses, so set the
 		 * filter to all 1's
 		 */
-		writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
-		writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
+		fec_writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
+		fec_writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
 
 		return;
 	}
 
 	/* Clear filter and add the addresses in hash register
 	 */
-	writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
-	writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
+	fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
+	fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
 
 	netdev_for_each_mc_addr(ha, dev) {
 		/* Only support group multicast for now */
@@ -1198,13 +1203,13 @@ static void set_multicast_list(struct ne
 		hash = (crc >> (32 - HASH_BITS)) & 0x3f;
 
 		if (hash > 31) {
-			tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
+			tmp = fec_readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
 			tmp |= 1 << (hash - 32);
-			writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
+			fec_writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
 		} else {
-			tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
+			tmp = fec_readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
 			tmp |= 1 << hash;
-			writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
+			fec_writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
 		}
 	}
 }
@@ -1221,10 +1226,10 @@ fec_set_mac_address(struct net_device *d
 
 	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 
-	writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
+	fec_writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
 		(dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24),
 		fep->hwp + FEC_ADDR_LOW);
-	writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
+	fec_writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
 		fep->hwp + FEC_ADDR_HIGH);
 	return 0;
 }
@@ -1323,7 +1328,7 @@ fec_restart(struct net_device *dev, int
 	u32 val, temp_mac[2];
 
 	/* Whack a reset.  We should wait for this. */
-	writel(1, fep->hwp + FEC_ECNTRL);
+	fec_writel(1, fep->hwp + FEC_ECNTRL);
 	udelay(10);
 
 	/*
@@ -1332,31 +1337,32 @@ fec_restart(struct net_device *dev, int
 	 */
 	if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
 		memcpy(&temp_mac, dev->dev_addr, ETH_ALEN);
-		writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
-		writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
+		fec_writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
+		fec_writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
 	}
 
 #ifdef CONFIG_FEC_1588
-	writel(0x7fff8000, fep->hwp + FEC_IEVENT);
+	fec_writel(0x7fff8000, fep->hwp + FEC_IEVENT);
 #else
 	/* Clear any outstanding interrupt. */
-	writel(0xffc00000, fep->hwp + FEC_IEVENT);
+	fec_writel(0xffc00000, fep->hwp + FEC_IEVENT);
 #endif
 
 	/* Reset all multicast.	*/
-	writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
-	writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
+	fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
+	fec_writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
 #ifndef CONFIG_M5272
-	writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
-	writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
+	fec_writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
+	fec_writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
 #endif
 
 	/* Set maximum receive buffer size. */
-	writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
+	fec_writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
 
 	/* Set receive and transmit descriptor base. */
-	writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
-	writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc) * RX_RING_SIZE,
+	fec_writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
+	fec_writel((unsigned long)fep->bd_dma +
+			sizeof(struct bufdesc) * RX_RING_SIZE,
 			fep->hwp + FEC_X_DES_START);
 
 	fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
@@ -1374,24 +1380,24 @@ fec_restart(struct net_device *dev, int
 	/* Enable MII mode */
 	if (duplex) {
 		/* MII enable / FD enable */
-		writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
-		writel(0x04, fep->hwp + FEC_X_CNTRL);
+		fec_writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
+		fec_writel(0x04, fep->hwp + FEC_X_CNTRL);
 	} else {
 		/* MII enable / No Rcv on Xmit */
-		writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
-		writel(0x0, fep->hwp + FEC_X_CNTRL);
+		fec_writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
+		fec_writel(0x0, fep->hwp + FEC_X_CNTRL);
 	}
 	fep->full_duplex = duplex;
 
 	/* Set MII speed */
-	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
+	fec_writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
 	/*
 	 * The phy interface and speed need to get configured
 	 * differently on enet-mac.
 	 */
 	if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
-		val = readl(fep->hwp + FEC_R_CNTRL);
+		val = fec_readl(fep->hwp + FEC_R_CNTRL);
 
 		/* MII or RMII */
 		if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
@@ -1405,23 +1411,23 @@ fec_restart(struct net_device *dev, int
 		else
 			val |= (1 << 9);
 
-		writel(val, fep->hwp + FEC_R_CNTRL);
+		fec_writel(val, fep->hwp + FEC_R_CNTRL);
 	} else {
 #ifdef FEC_MIIGSK_ENR
 		if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
 			/* disable the gasket and wait */
-			writel(0, fep->hwp + FEC_MIIGSK_ENR);
-			while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
+			fec_writel(0, fep->hwp + FEC_MIIGSK_ENR);
+			while (fec_readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
 				udelay(1);
 
 			/*
 			 * configure the gasket:
 			 *   RMII, 50 MHz, no loopback, no echo
 			 */
-			writel(1, fep->hwp + FEC_MIIGSK_CFGR);
+			fec_writel(1, fep->hwp + FEC_MIIGSK_CFGR);
 
 			/* re-enable the gasket */
-			writel(2, fep->hwp + FEC_MIIGSK_ENR);
+			fec_writel(2, fep->hwp + FEC_MIIGSK_ENR);
 		}
 #endif
 	}
@@ -1433,22 +1439,22 @@ fec_restart(struct net_device *dev, int
 		ret = fec_ptp_start(fep->ptp_priv);
 		if (ret) {
 			fep->ptimer_present = 0;
-			writel(2, fep->hwp + FEC_ECNTRL);
+			fec_writel(2, fep->hwp + FEC_ECNTRL);
 		} else {
-			val = readl(fep->hwp + FEC_ECNTRL);
+			val = fec_readl(fep->hwp + FEC_ECNTRL);
 			val |= 0x00000012;
-			writel(val, fep->hwp + FEC_ECNTRL);
+			fec_writel(val, fep->hwp + FEC_ECNTRL);
 		}
 	} else
-		writel(2, fep->hwp + FEC_ECNTRL);
+		fec_writel(2, fep->hwp + FEC_ECNTRL);
 #else
 	/* And last, enable the transmit and receive processing */
-	writel(2, fep->hwp + FEC_ECNTRL);
+	fec_writel(2, fep->hwp + FEC_ECNTRL);
 #endif
-	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
+	fec_writel(0, fep->hwp + FEC_R_DES_ACTIVE);
 
 	/* Enable interrupts we wish to service */
-	writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
+	fec_writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
 }
 
 static void
@@ -1458,21 +1464,22 @@ fec_stop(struct net_device *dev)
 
 	/* We cannot expect a graceful transmit stop without link !!! */
 	if (fep->link) {
-		writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
+		/* Graceful transmit stop */
+		fec_writel(1, fep->hwp + FEC_X_CNTRL);
 		udelay(10);
-		if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
+		if (!(fec_readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
 			printk("fec_stop : Graceful transmit stop did not complete !\n");
 	}
 
 	/* Whack a reset.  We should wait for this. */
-	writel(1, fep->hwp + FEC_ECNTRL);
+	fec_writel(1, fep->hwp + FEC_ECNTRL);
 	udelay(10);
-	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
+	fec_writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 #ifdef CONFIG_FEC_1588
 	if (fep->ptimer_present)
 		fec_ptp_stop(fep->ptp_priv);
 #endif
-	writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
+	fec_writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
 }
 
 static int __devinit
