1. Made the connection between CNS3xxx SOCs(ARCH_CNS3xxx) and MPcore watchdog
   since the CNS3xxx SOCs have ARM11 MPcore CPU.
2. Enable mpcore_watchdog option as module to default configuration at
   arch/arm/configs/cns3420vb_defconfig.

Signed-off-by: Tommy Lin <tommy.lin@caviumnetworks.com>

---
arch/arm/Kconfig                     |    1 +
 arch/arm/configs/cns3420vb_defconfig |    2 ++
 arch/arm/mach-cns3xxx/cns3420vb.c    |   22 ++++++++++++++++++++++
 3 files changed, 25 insertions(+), 0 deletions(-)

--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -372,6 +372,7 @@ config ARCH_CNS3XXX
 	select MIGHT_HAVE_CACHE_L2X0
 	select MIGHT_HAVE_PCI
 	select PCI_DOMAINS if PCI
+	select HAVE_ARM_TWD
 	help
 	  Support for Cavium Networks CNS3XXX platform.
 
--- a/arch/arm/configs/cns3420vb_defconfig
+++ b/arch/arm/configs/cns3420vb_defconfig
@@ -53,6 +53,8 @@ CONFIG_LEGACY_PTY_COUNT=16
 # CONFIG_HW_RANDOM is not set
 # CONFIG_HWMON is not set
 # CONFIG_VGA_CONSOLE is not set
+CONFIG_WATCHDOG=y
+CONFIG_MPCORE_WATCHDOG=m
 # CONFIG_HID_SUPPORT is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_MMC=y
--- a/arch/arm/mach-cns3xxx/cns3420vb.c
+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
@@ -159,10 +159,32 @@ static struct platform_device cns3xxx_us
 	},
 };
 
+/* Watchdog */
+static struct resource cns3xxx_watchdog_resources[] = {
+	[0] = {
+		.start = CNS3XXX_TC11MP_TWD_BASE,
+		.end   = CNS3XXX_TC11MP_TWD_BASE + PAGE_SIZE - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = IRQ_LOCALWDOG,
+		.end   = IRQ_LOCALWDOG,
+		.flags = IORESOURCE_IRQ,
+	}
+};
+
+static struct platform_device cns3xxx_watchdog_device = {
+	.name		= "mpcore_wdt",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(cns3xxx_watchdog_resources),
+	.resource	= cns3xxx_watchdog_resources,
+};
+
 /*
  * Initialization
  */
 static struct platform_device *cns3420_pdevs[] __initdata = {
+	&cns3xxx_watchdog_device,
 	&cns3420_nor_pdev,
 	&cns3xxx_usb_ehci_device,
 	&cns3xxx_usb_ohci_device,
